The present invention relates to a semiconductor integrated circuit having a configuration circuit such that the resource mapping is defined from the outside of it, and more specifically, it relates to a technique useful, for example, in the applications to PCI (Peripheral Component Interconnect) devices designed for Plug and Play.
PCI bus is designed for Plug and Play, and various settings including the resource mapping to a device to be connected are made by a system, i.e. an OS (Operating System) (see JP-A-11-39249). In this step, a memory space that the device needs depends on the configuration of a base address register in the configuration register that the device has. More specifically, the base address register is composed of low-order bits with fixed logical values and high-order bits with variable logical values. The number of bits with fixed logical values defines the size of a local address region, and a high-order portion of the base address of a local address space is held in a logical-value-variable region. When a system maps a base address to a PCI device, the system writes the data, i.e. the logical value “1,” into all bits of the base address register and then reads out values held in the register to automatically calculate the size of an address space that the device needs based on the number of bits into which the logical value “1” cannot be written (the number of low-order bits with fixed logical values in the base address register). After that, the system writes an address into high-order bits with variable logical values in the base address register to map a local address space to the device.